Storing data in the IoT

Andrew Pockson, Divisional Marketing manager
Semiconductors at Anglia

Whilst the selection criteria for Cloud data storage focus on physical size, reliability, speed and power consumption, data storage at IoT nodes has different priorities.

Embedded flash (eFlash) memory is well suited to IoT applications requiring storage of critical data and code. Its field programming capability gives the flexibility to store last minute system-level changes, whilst relatively high performance (>6.4 GB/s readout speed) and high density enable typical embedded microcontroller applications.

As the number of IoT devices in the field grows exponentially, so does the requirement for greater intelligence in the node along with larger storage density and the needs for integrity and security of data stored there. NOR flash memory is typically used in such embedded applications, says Andrew Pockson, Divisional Marketing manager, Semiconductors at Anglia.

CS6786_vip_iot_Fig 1
Figure 1 Embedded Non-volatile memory density and endurance (Source: https://www.synopsys.com/Company/Publications/DWTB/Pages/dwtb-memory-options-for-iot-2016q1.aspx)

However, in order to deliver the extra functionality in IoT devices, demand is growing for larger memory densities for saving software (including boot up programs, firmware, and embedded OS) and data (including log data). This is driving demand for single-level cell (SLC) NAND flash memory, which offers higher density and comparable reliability than NOR flash memory – and at lower cost per-bit.

These characteristics are embodied in new devices like Toshiba’s Serial Interface NAND IC, which offers three densities up to 4Gb based on 24nm technology. Compatibility with the widely used Serial Peripheral Interface (SPI), which can be controlled with just six pins, allows the new “Serial Interface NAND” to be used as SLC NAND flash memory, with a low pin count, small package and large capacity.

Improving integrity & security

A disadvantage of standard SLC NAND Flash memory is that error correction code has to be provided by the host processor. Building ECC into the memory chip hardware itself removes that burden. BENAND™ devices with hardware ECC are available in densities from 1Gbit to 8Gbit, providing all the necessary endurance and data retention for sensitive or frequently used data in IoT nodes.

Greater security and even better performance are exemplified by STMicro’s IC designed to complement a range of IoT-capable microcontrollers. Devices such as the STM32L476xx family embed high-speed memories (Flash memory up to 1 Mbyte with up to 128 Kbyte of SRAM), a flexible external memory controller (FSMC) for static memories, a Quad SPI flash memories interface and an extensive range of enhanced I/O and peripherals connected to two APB buses, two AHB buses and a 32-bit multi-AHB bus matrix.

CBH.jpgGOSGJYU9
Figure 2 BENAND™ removes the burden of error correction code (ECC) from the host processor by offering ECC embedded in the hardware while keeping the same specification, high reliability and performance as a raw SLC. (Source: http://www.anglia-live.com/netalogue/pdfs/tos/datasheets/Toshiba_FAB_SLC_BENAND_052014_FINAL.pdf)

These memories embed several protection mechanisms for embedded Flash memory and SRAM including readout protection, write protection, proprietary code readout protection and Firewalls.

Higher storage capacity

Meeting the need for higher data storage densities in IoT, embedded Multi Media Card (eMMC) standards provide the equivalent of familiar MMC cards on a chip. Features of the e-MMC are low cost, high performance, and low power consumption. Since it has a specifically designed controller, it can be easily integrated into application systems which have a MMC/HS-MMC interface. And the latest JEDEC eMMC Version 5.1 defines two new features to improve performance and security: command queuing and secure write protection.

Command queuing allows users to process multiple tasks generated by the user’s issue of multiple commands, in the order of the user’s preference, by initially storing the tasks in a waiting queue. Toshiba has quantified its benefits, finding that command queuing improves random read performance speed by approximately 30% at maximum compared to existing products.

Secure write protection expands the conventional write protect feature and protects the user’s data stored in an assigned area from being overwritten or erased by unauthenticated users.

Products based on these latest eMMC standards integrate NAND chips fabricated with a controller to manage basic control functions for NAND applications in a single package. A fast HS-MMC interface is included and typical capacities available run from 16GB, 32GB and 64GB to 128GB.

The author of this blog is Andrew Pockson, Divisional Marketing manager, Semiconductors at Anglia

About the Author:

Andrew Pockson is Divisional Marketing manager for Semiconductors at Anglia. He has over 20 years of distribution experience, in technical and marketing support roles. Previous positions have included Technical Marketing manager and Field Applications engineer gaining extensive knowledge and experience using passive, e-mech and semiconductor products.

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