James Wilson
Silicon Labs introduces industry’s broadest portfolio for 56G/112G SerDes clocking
Silicon Labs has expanded its timing portfolio to meet the high-performance clocking requirements of 56G PAM-4 SerDes and emerging 112G serial applications. With this portfolio expansion, Silicon Labs is the only timing supplier to offer a comprehensive selection of clock generators,
Read moreSilicon Labs and Calnex simplify SyncE applications at 25G and 100G Ethernet rates
Silicon Labs and Calnex Solutions announced a proven reference design for ITU-T G.8262-compliant Synchronous Ethernet (SyncE) applications at 25G and 100G Ethernet rates. The solution is based on the Marvell® Alaska® C family of high-speed Ethernet transceivers,
Read moreIndustry’s first low-power PCI Express Gen 4 buffers raise the bar in power and performance
Silicon Labs has introduced a new family of low-power PCI Express® (PCIe®) Gen 1/2/3/4 clock buffers that provide ultra-low jitter clock distribution in 1.5 V and 1.8 V applications. With additive jitter performance of 40 fs RMS (typical), Silicon Labs’ new Si532xx PCIe clock buffers provide more than 90% margin
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